The partition of software / hardware and the architecture design of hardware are completed in the system level design of line 在頂層設(shè)計(jì)完成了軟硬件劃分和硬件體系架構(gòu),根據(jù)硬件架構(gòu)進(jìn)行功能模塊的劃分并選用適當(dāng)?shù)膇p 。
Systemc is a system level design language which can be used efficiently in hardware / software co - design and co - simulation . it extends the abilities to describe hardware systems in the basis of c + + language Systemc是一種適合于進(jìn)行硬軟件協(xié)同設(shè)計(jì)和模擬的語(yǔ)言,它在c + +語(yǔ)言的基礎(chǔ)上擴(kuò)充了硬件系統(tǒng)的描述功能。
5 the conception that top - down system level design and bottom - up building library are parallel operations is proposed for the first time , and the conception of parallel design flow is brought forward according to this 85 、提出了自上而下的系統(tǒng)設(shè)計(jì)與自下而上的建庫(kù)是并行操作的概念,并據(jù)此提出并行設(shè)計(jì)流程的概念。 。
3 the conception and methodology on orthogonalization of separation between ip mapping and platform mapping in system level design is proposed for the first time . and a new platform based on design flow is brought forward according to this conception 3 、提出了系統(tǒng)級(jí)設(shè)計(jì)中ip映射與平臺(tái)映射分離的正交設(shè)計(jì)概念和方法, 11合肥工業(yè)大學(xué)博士學(xué)位論文并據(jù)此提出了新的基于平臺(tái)的設(shè)計(jì)流程。
System level design . in this level , the thesis provides the system partition method , function design and method of design based on finite state machine . the key is the modification of available soft ip and realization of ad bus reuse technology 系統(tǒng)級(jí)設(shè)計(jì):論述了pci安全芯片的系統(tǒng)劃分、功能設(shè)計(jì)和基于有限狀態(tài)機(jī)的設(shè)計(jì)思想,重點(diǎn)是對(duì)已有ip的修改方法和ad總線再?gòu)?fù)用技術(shù)的實(shí)現(xiàn)。